Publications

   Journal Pubublications

• Z. Shao, Q. Zhuge, M. Liu, C. Xue, E. H.-M. Sha and B. Xiao, ``Algorithms and Analysis of Scheduling for Loops with Minimum Switching", International Journal of Computational Science and Engineering (IJCSE), Vol. 2, May 2006, pp. 88-97.
  
  
• Q. Zhuge, C. Xue, Z. Shao, M. Liu, M. Qiu, and E. H.-M. Sha,``Design Optimization and Space Minimization Considering Timing and Code Size via Retiming and Unfolding," in Journal of Microprocessors and Microsystems, Vol. 30, Issue 4, June 2006, pp. 173-183.
  
  
• C. Xue, Z. Shao, Q. Zhuge, B. Xiao, M. Liu, and E. H.-M. Sha,``Optimizing Address Assignment for Scheduling DSPs with Multiple Functional Units,`` in IEEE Transactions on Circuits and Systems II (TCAS-II), Vol. 53, No. 9, pp. 976 - 980, September 2006.
  
  
• C. Xue, Z. Shao, M. Liu, M. Qiu and E. H.-M. Sha, `` Optimizing Parallelism for Nested Loops with Iterational and Instructional Retiming,`` Accepted for publication in Journal of Embedded Computing (JEC) 2006.
  
  
• M. Qiu, C. Xue, Z. Shao, M. Liu and E. H.-M. Sha, `` Energy Minimization for Heterogeneous Wireless Sensor Networks,`` Accepted for publication in Journal of Embedded Computing (JEC), 2006.
  
  
• M. Qiu, E. H.-M. Sha, M. Liu, M. Lin, S. Hua, and L. T. Yang, "Energy Minimization with Loop Fusion and Multi-Functional-Unit Scheduling for Multidimensional DSP", in Journal of Parallel and Distributed Computing (JPDC), 2007.
  
  
• C. Xue, M. Liu, QingFeng Zhuge, and Edwin H.-M. Sha, " Variable Length Pattern Matching for Hardware Network Intrusion Detection System", in Journal of Signal Processing Systems (JSPS), 2008.
  
  
• M. Liu, Q. Zhuge, E. H.-M. Sha, Y. He, and M. Qiu, ``Loop Distribution and Fusion with Timing and Code Size Optimization``, Accepted for publication in The Journal of Signal Processing Systems (JSPS), 2010.
  
  
• M. Liu, Q. Zhuge, C. Xue, Z. Shao and E. H.-M. Sha, ``General Loop Fusion Technique with Improved Timing Performance and Minimal Code Size�, Submitted to IEEE Transactions on Computers.
  
  
• M. Liu, Q. Zhuge, C. Xue, Z. Shao and E. H.-M. Sha, ``Efficient Loop Fusion for Two-level Loops Considering Timing and Code Size``, Submitted to Journal of Embedded Computing.
  
  
• C. Xue, Z. Shao, M. Liu, M. Qiu, and E. H.-M. Sha, ``Optimizing DSP Scheduling by Considering Address Assignment with Array and Loop Transformation``,�Submitted to IEEE Transactions on Signal Processing.
  
  

   Book Chapters

• M. Liu, C. Xue, Q. Zhuge, M. Qiu, Z. Shao, E. H.-M. Sha, ``Optimizing Nested Loops with Loop Distribution and Loop Fusion``, Accepted in Embedded Systems: Status and Perspective, American Scientific publishers, December 2006.
  
  

   Conference Publications

• M. Liu, E. H.-M. Sha, C. Xue and M. Qiu, `` Legalizing Loop Fusion with Minimal Memory Cost," in 24th International Conference on Computers and Their Applications (CATA�2009), New Orleans, USA, April, 2009.
  
  
• C. Xue, Z. Shao, M. Liu, Q. Zhuge and E. H.-M. Sha, `` Parallel Network Intrusion Detection on Reconfigurable Platform," in Proc. 2007 IFIP International Conference on Embedded And Ubiquitous Computing (EUC'2007), Lecture Note in Computer Science (LNCS), Springer. Taiwan, Dec 2007.
  
  
• M. Liu, C. Xue, M. Qiu, E. H.-M. Sha, ``Optimizing Timing and Code Size Using Maximum Direct Loop Fusion``, in Proc. The 19th International Conference on Parallel and Distributed Computing Systems (ISCA PDCS 2006), San Francisco, California, September 2006.
  
  
• C. Xue, Z. Shao, M. Liu, M. Qiu, E. H.-M. Sha, ``Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture``, in Proc. The 12th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2006), Minneapolis, MN, July 2006, pp. 375-382.
  
  
• C. Xue, Z. Shao, M. Liu, M. Qiu and E. H.-M. Sha, `` Loop Striping: Maximizing Parallelism for Nested Loops``, in Proc. 2006 IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2006), Seoul, Korea, August, 2006.
  
  
• M. Qiu, C. Xue, Q. Zhuge, Z. Shao, M. Liu and E. H.-M. Sha, `` Voltage Assignment and Loop Scheduling for Energy Minimization while Satisfying Timing Constraint with Guaranteed Probability``, in Proc. IEEE 17th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), Steamboat Springs, Colorado, Sept. 2006.
  
  
• M. Qiu, C. Xue, Z. Shao, Q. Zhuge, M. Liu and E. H.-M. Sha, `` Efficient Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network``, in Proc. 2006 IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2006), Seoul, Korea, August, 2006.
  
  
• M. Qiu, Z. Shao, Q. Zhuge, C. Xue, M. Liu and E. H.-M. Sha, ``Efficient Assignment with Guaranteed Probability for Heterogeneous Parallel DSP``, in Proc. The 12th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2006), Minneapolis, MN, July 2006, pp. 623 - 630.
  
  
• M. Liu, Q. Zhuge, Z. Shao, C. Xue, M. Qiu,�and E. H.-M. Sha, ``Maximum Loop Distribution and Fusion for Two-level Loops Considering Code Size``, in Proc. The 8th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN 2005), Las Vegas, Nevada, December 2005.
  
  
• M. Liu, Q. Zhuge, Z. Shao, C. Xue, M. Qiu,�and E. H.-M. Sha, ``Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs``, in Proc. 2005 IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2005), pp. 121-130, Nagasaki, Japan, 6-9 December 2005.
  
  
• C. Xue, Z. Shao, M. Liu, M.Qiu, and E. H.-M. Sha, ``Optimizing Nested Loops with Iterational and Instructional Retiming``, in Proc. 2005 IFIP International Conference on Embedded and Ubiquitous Computing (EUC'2005). Nagasaki, Japan, 6-9 December 2005.
  
  
• M. Liu, Z. Shao, C. Xue, K. Chen, E. H.-M. Sha, ``Multi-level Loop Fusion with Minimal Code Size``, in Proc. The 18th International Conference on Parallel and Distributed Computing Systems (ISCA PDCS 2005), pp. 348-353, Las Vegas, Nevada, September 2005.
  
  
• K. Chen, M. Liu, and E. H.-M. Sha, ``A Feasible Baseline Architecture for Building and Evaluating Distributed Systems``, in Proc. The 18th International Conference on Parallel and Distributed Computing Systems (ISCA PDCS 2005), pp. 185-190, Las Vegas, Nevada, September 2005.
  
  
• C. Xue, Z. Shao, M. Liu and E. H.-M. Sha, ``Iterational Retiming: Maximize Iteration-Level Parallelism for Nested Loops``, in Proc. The 2005 ACM/IEEE/IFIP International Conference on Hardware - Software Codesign and System Synthesis (ISSS-CODES'05), New York, September 2005.
  
  
• M. Qiu, M. Liu, C. Xue, Z. Shao, Q. Zhuge and E. H.-M. Sha, ``Optimal Assignment with Guaranteed Confidence Probability for Trees on Heterogeneous DSP Systems``, in Proc. The 17th IASTED International Conference on Parallel and Distributed Computing Systems, pp. 185-190, Phoenix, Arizona, November 2005.
  
  
• M. Liu, Q. Zhuge, Z. Shao, and E. H.-M. Sha, ``General Loop Fusion Technique for Nested Loops Considering Timing and Code Size``, in Proc. ACM/IEEE International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES 2004), pp. 190-201, Washington, DC, September 2004.
  
  
• M. Liu, Q. Zhuge, Z. Shao, K. Chen, and E. H.-M. Sha, ``Loop Fusion via Retiming for DSP Applications``, in Proc. 17th International Conference on Parallel and Distributed Computing Systems (ISCA PDCS), pp. 403-408, San Francisco, California, September 2004.
  
  
• Z. Shao, Q. Zhuge, M. Liu, B. Xiao and E. H.-M. Sha, ``Switching-Activity Minimization on Instruction-level Loop Scheduling for VLIW DSP Applications``, in Proc. IEEE 15th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2004), pp. 224-234, Galveston, Texas, September 2004.
  
  
• Z. Shao, Q. Zhuge, M. Liu, E. H.-M. Sha and B. Xiao, ``Loop Scheduling for Real-Time DSPs with Minimum Switching Activities on Multiple-functional-unit Architectures``, in Proc. The 2004 International Conference on Embedded and Ubiquitous Computing (EUC 2004), pp. 53-63, LNCS, Aizu-Wakamatsu City, Japan, August 2004.
  
  
• Z. Shao, Q. Zhuge, Y. He, C. Xue, M. Liu and E. H.-M. Sha, ``Assignment and Scheduling of Real-time DSP Applications for Heterogeneous Functional Units``, in 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM Proceeding, Santa Fe, New Mexico, April 2004.