Digital Design with HDL

Course Type: 
EE
Code: 
2000
Level: 
Undergraduate
Credit Hours: 
3
Schedule Type: 
Lecture
Description: 

Introduction to combinational and synchronous sequential digital system design and optimization. Use of structural hardware description language (HDL) with CAD tools for design and simulation in a field programmable gate array (FPGA) based laboratory environment. Design and testing of simple combinational and synchronous sequential circuits.

Prerequisites: 

WSU Math Placement 05 or Undergraduate level MTH 1280 Minimum Grade of C

Corequisites: 

EE2000L