Very Large Scale Integrated Circuit Design Laboratory

Course Type: 
CEG
Code: 
4322L
Level: 
Undergraduate
Credit Hours: 
1
Schedule Type: 
Lab
Description: 

Work station based experience designing asic devices for evaluation and testing. Department Managed Prerequisite(s): Undergraduate level EE 2000 Minimum Grade of D and Undergraduate level EE 2000L Minimum Grade of D

Corequisites: 

CEG4322

Restrictions: 
May not be enrolled in one of the following Degrees: Intending Egr & CS. Must be enrolled in one of the following Colleges: College of Egr & Computer Sci.